Tuesday 15 February 2011

assembly - Compiling to ASM on an ARM chip, why are only r1, r2 and r3 registers used -


I'm just looking at ARM assembly on raspberry P (will received a comment link to good docs)

I've compiled using a C ++ program that I follow orders Assembler

  g ++ S -fverbose- ASM March = armv6j -mtune = arm1176jzf-s File CPP   

Then I can inspect file.s which is great and it has some kind of meaning. Although I thought that ARM chips are 15 general-purpose registers is the code to read its that it was using only r1 - R3

  mov R3, R3, ASL # 1 @ tmp166 , tmp166, add R3, R3, r2 @ tmp166, tmp166, D.24883 mov R2, R3, ASL # 3 @ tmp167, tmp166, add R3, R3, r2 @ tmp166, tmp166, tmp167 RSB R2, R3, r1 @ D .24883, tmp166, Tmp161   

I do not see the presence of a register more than the r3 in the generated code, am I finding something basic? Is there a good reason for this? Or what code does the code generate?

UPDATE

  1. If I'd compiled -O2 to use it more registers, then I'm assuming that this is something that GCC chooses.
  2. I have also read that r1-r4 can be used without resetting their state, so I think it is more efficient for small work?

    ARM ABI, which is not unusual for different processor families that When the compiler generates the code for the target, some registers are used to pass in the standards, one / some registers are used to return a result, and some registers have to be protected. Basically you can dabble with them without worrying , And the rest of the need for protection of your registers (to stack / push / pop) if you have to use them.

    Adam uses r0-r3 to pass in the parameter, and r0 to return the result. R0-R3 is also considered disposable (and perhaps another higher registers), so if the program is quite simple and doesnt need too many registers will try to use r0-R3 for it to perform (using the stack Not needed).

    Preparing a high level code to run the machine code is an art form that you have to understand compilers and processors, etc. You are on the right track but need to write many tasks, to generate and test the machine code.

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