Tuesday, 15 March 2011

real time - Partial FPGA reconfiguration and performance -


These questions may seem very cryptic, but I really want to know more about this stuff.

First

I'm thinking how long it takes to re-configure an FPGA itself, from the time when its modeling circuit is in a new location and operating Goes down over time.

I know that location- & amp; -Vertage is a costly process, but the reason is that P & amp; R devices should decide components and how to route them.

Think P & amp; R has been analyzed, and whichever is omitted is actually reconfiguring the FPGA: Is this a slow process? Can it be hundreds or thousands of times per second?

There are several implications for such a possibility that I am eager about. To name 2, it can allow us to serve an FPGA for many concurrent "clients" (similarly a GPU is able to provide goods for many different programs), or long number-crunch Provides a very good tuned circuit for doing well-defined processes but many processing steps of high asynchronous processing (think: complex hosel programs).

I want to ask that any FPGA can be partially reconfigured in realtime, while the modeling circuit is operated and operated, until the parts are again Is configured, then operated.

This possibility will have many interesting effects, for example, Realtime Reconfigurable Buses, Hardware Simulation of Neural Network etc.

Are such things being researched on a big scale right now? And how likely can it be to do research in the future?

The configuration time depends on a lot of things.

  • How fast you can get data (quad-

    Large FPGA can be very large to configure between 10 to 100 s milliseconds.

    A small configuration can be obtained within PCI Express startup time (100 MBIERC) so that a pure FPGA card can be enumerated in time and then the rest of the configuration can be loaded.

    Very dynamic restructuring In the meantime, it is more likely that the bottle neck is swapping different data sets that go with each bitstream - I imagine anything which requires a lot of FPGA to speed up the dataset ... But can you have other applications?

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