vhdl - getting undefined symbol error, even thought the variable is defined syntactically -

  PWM is the architecture starts kind of behavior to spoil array (1 to 64) integer range from 0 4000; ----------------------------------------------- for the full Tables move Fixed full_pmm1_1: lootable: = (3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 39 00,0, 0, 3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900, 0,0, 3900, 3900,0,03900, 3900,0,0, 3900, 3900,0,0, 3900, 3900,0,0,3900); Variable ds1_1: integer range 0 to 4000; - PWM1_1 variable c_full, c_half, c_quat, c_eigh, c_sixt: charge cycle variables for integer range 1 to 64; Select the starting state of the process (GCLK) when "001" => -------------------- Complete step if DIR = '1' then -------------------- direction Selection ds1_1: = full_pwm1_1 (c_full);   
 all other variables about which I have not mentioned them defined as integer, with appropriate categories, and all defined by the syntax.  
 But I have an "undefined" symbol "error for everyone and also, full_pwm1_1 continuous even if someone can help me and can verify that the array announcement and urgency are correct?  
 
 
 Continuous declaration between type of type and "architecture" line and "beginning" line, such as:  < Pre>  architecture behavior type of pwm is robust array of array (1 to 64) range from 0 to 4000; continuous full_pmm 1_1: robbery: = (3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0, 3, 3, 3, 9 00,0, 0, 3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0,3900, 3900,0,0, 3 9 00, 3900,0,0, 3900, 3900,0,0, 3900, 3900,0,0, 3900, 3900,0, 3, 3, 3) ... ... is starting ... < Write variable announcements between "process" and "start", such as  
  process (gclk) variable ds1_1: integer range 0 to 4000; - PWM1_1 variable C_full, c_half, c_quat, c_eigh, c_sixt: Charging variables for integer ranges 1 to 64; Start ...   
 Or declare ds1_1 etc as signals, e.g. :  
  ... signal ds1_1: integer seam 0 to 4000; - PWM1_1 cues c_full, c_half, c_quat, c_eigh, c_sixt: Duty Cycle Variable for integer category 1 to 64; ... Start ... Process (GCLK) ...